Aaeon EMB-CV1 series Instrukcja Użytkownika Pobierz pdf (Strona 37)

Industrial Motherboard

EMB-CV1 series

Appendix A Programming the Watchdog Timer A-2

A.1 Programming

EMB-CV1 utilizes ITE 8783 chipset as its watchdog

timer controller. Below are the procedures to complete its

configuration and this initial watchdog timer program is

also attached based on which you can develop

customized program to fit your application.

Configuring Sequence Description

After the hardware reset or power-on reset, the ITE 8783 enters the

normal mode with all logical devices disabled except

KBC. The initial state (enable bit ) of this logical device (KBC) is

determined by the state of pin 121 (DTR1#) at the falling edge of

the system reset during power-on reset.

1 2 ... 32 33 34 35 36 37 38 39 40 41 42 ... 48 49

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Aaeon EMB-CV1 series Instrukcja Użytkownika Strona 37